3D GPU architecture using cache stacking: Performance, cost, power and thermal analysis

Al Maashri Ahmed; Guangyu Sun; Xiangyu Dong; Vijay Narayanan; Yuan Xie

doi:10.1109/ICCD.2009.5413147

3D GPU architecture using cache stacking: Performance, cost, power and thermal analysis

Al Maashri Ahmed, Guangyu Sun, Xiangyu Dong, Vijay Narayanan, Yuan Xie

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

32 Citations (Scopus)

Abstract

Graphics Processing Units (GPUs) offer tremendous computational and processing power. The architecture requires high communication bandwidth and lower latency between computation units and caches. 3D die-stacking technology is a promising approach to meet such requirements. To the best of our knowledge no other study has investigated the implementation of 3D technology in GPUs. In this paper, we study the impact of stacking caches using the 3D technology on GPU performance. We also investigate the benefits of using 3D stacked MRAM on GPUs. Our work includes cost, power, and thermal analysis of the proposed architectural designs. Our results show a 53% geometric mean performance speedup for iso-cycle time architectures and about 19% for iso-cost architectures.

Original language	English
Title of host publication	2009 IEEE International Conference on Computer Design, ICCD 2009
Pages	254-259
Number of pages	6
DOIs	https://doi.org/10.1109/ICCD.2009.5413147
Publication status	Published - 2009
Externally published	Yes
Event	2009 IEEE International Conference on Computer Design, ICCD 2009 - Lake Tahoe, CA, United States Duration: Oct 4 2009 → Oct 7 2009

Publication series

Name	Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
ISSN (Print)	1063-6404

Other

Other	2009 IEEE International Conference on Computer Design, ICCD 2009
Country/Territory	United States
City	Lake Tahoe, CA
Period	10/4/09 → 10/7/09

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/ICCD.2009.5413147

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Ahmed, A. M., Sun, G., Dong, X., Narayanan, V., & Xie, Y. (2009). 3D GPU architecture using cache stacking: Performance, cost, power and thermal analysis. In 2009 IEEE International Conference on Computer Design, ICCD 2009 (pp. 254-259). Article 5413147 (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors). https://doi.org/10.1109/ICCD.2009.5413147

3D GPU architecture using cache stacking: Performance, cost, power and thermal analysis. / Ahmed, Al Maashri; Sun, Guangyu; Dong, Xiangyu et al.
2009 IEEE International Conference on Computer Design, ICCD 2009. 2009. p. 254-259 5413147 (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Ahmed, AM, Sun, G, Dong, X, Narayanan, V & Xie, Y 2009, 3D GPU architecture using cache stacking: Performance, cost, power and thermal analysis. in 2009 IEEE International Conference on Computer Design, ICCD 2009., 5413147, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, pp. 254-259, 2009 IEEE International Conference on Computer Design, ICCD 2009, Lake Tahoe, CA, United States, 10/4/09. https://doi.org/10.1109/ICCD.2009.5413147

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AB - Graphics Processing Units (GPUs) offer tremendous computational and processing power. The architecture requires high communication bandwidth and lower latency between computation units and caches. 3D die-stacking technology is a promising approach to meet such requirements. To the best of our knowledge no other study has investigated the implementation of 3D technology in GPUs. In this paper, we study the impact of stacking caches using the 3D technology on GPU performance. We also investigate the benefits of using 3D stacked MRAM on GPUs. Our work includes cost, power, and thermal analysis of the proposed architectural designs. Our results show a 53% geometric mean performance speedup for iso-cycle time architectures and about 19% for iso-cost architectures.

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3D GPU architecture using cache stacking: Performance, cost, power and thermal analysis

Abstract

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