TY - GEN
T1 - 3D GPU architecture using cache stacking
T2 - 2009 IEEE International Conference on Computer Design, ICCD 2009
AU - Ahmed, Al Maashri
AU - Sun, Guangyu
AU - Dong, Xiangyu
AU - Narayanan, Vijay
AU - Xie, Yuan
PY - 2009
Y1 - 2009
N2 - Graphics Processing Units (GPUs) offer tremendous computational and processing power. The architecture requires high communication bandwidth and lower latency between computation units and caches. 3D die-stacking technology is a promising approach to meet such requirements. To the best of our knowledge no other study has investigated the implementation of 3D technology in GPUs. In this paper, we study the impact of stacking caches using the 3D technology on GPU performance. We also investigate the benefits of using 3D stacked MRAM on GPUs. Our work includes cost, power, and thermal analysis of the proposed architectural designs. Our results show a 53% geometric mean performance speedup for iso-cycle time architectures and about 19% for iso-cost architectures.
AB - Graphics Processing Units (GPUs) offer tremendous computational and processing power. The architecture requires high communication bandwidth and lower latency between computation units and caches. 3D die-stacking technology is a promising approach to meet such requirements. To the best of our knowledge no other study has investigated the implementation of 3D technology in GPUs. In this paper, we study the impact of stacking caches using the 3D technology on GPU performance. We also investigate the benefits of using 3D stacked MRAM on GPUs. Our work includes cost, power, and thermal analysis of the proposed architectural designs. Our results show a 53% geometric mean performance speedup for iso-cycle time architectures and about 19% for iso-cost architectures.
UR - http://www.scopus.com/inward/record.url?scp=77951019767&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77951019767&partnerID=8YFLogxK
U2 - 10.1109/ICCD.2009.5413147
DO - 10.1109/ICCD.2009.5413147
M3 - Conference contribution
AN - SCOPUS:77951019767
SN - 9781424450282
T3 - Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
SP - 254
EP - 259
BT - 2009 IEEE International Conference on Computer Design, ICCD 2009
Y2 - 4 October 2009 through 7 October 2009
ER -