Selection of Right Architecture for Specific Embedded Vision Applications

Research output: Contribution to conferencePaperpeer-review

Abstract

Embedded Vision (EV) systems rely on advanced Computer Vision (CV) algorithms implemented on programmable embedded computing platforms, where the optimal resource utilization is of paramount importance. Many of these algorithms deliver state-of-the-art accuracy in a myriad of applications, however, they require high computational power and large amounts of memory. Therefore, it can benefit greatly from parallelization on multi-core processors. For EV applications Central Processing Units (CPUs), Graphics Processing Units (GPUs), Field Programmable Gate Arrays (FPGAs), Digital Signal Processor (DSPs), Application-Specific Integrated Circuits (ASICs), and Microcontrollers (MCUs) can be used. While general-purpose-based machines, especially (GPUs), have performed well for CV processing due to their ease of programmability and high parallelism, their excessive power consumption hinders deployment in embedded or low-power portable systems. Increasingly, there is an interest in providing more specialized hardware acceleration of the vision computation. Accelerators can be in the form of fixed function hardware (e.g. ASICs), programmable cores (e.g. GPUs) or dynamically programmable logic (e.g. FPGAs) for delivering a high performance requirement. Field Programmable Gate Arrays receive a significant attention due to its low power consumption and flexibility. Thus, due to the immense progression of hardware, software and algorithms are used in EV, re-configurability plays an important role which is which is uniquely supported by FPGAs. These devices are not only superior to ASICs – due to the reason of offering the low cost and fast acceleration solution because of the millions of programmable gates and hundreds of I/O pins, but they are also better than CPUs, which should have a time-slice, one or more multi-thread tasks as they compete for compute resources (by providing the simultaneous acceleration of multiple portions of a computer vision pipeline). This paper aimed to present about the selection of the right architecture for specific EV applications.

p.665
IKSAD Publications - 2022©
Issued: 06.06.2022
ISBN: 978-625-7464-90-1
Original languageEnglish
Pages665-665
Number of pages1
Publication statusPublished - Jun 6 2022
EventIst-International Congress on Modern Sciences - TASHKENT, Uzbekistan
Duration: May 10 2022May 12 2022

Conference

ConferenceIst-International Congress on Modern Sciences
Country/TerritoryUzbekistan
CityTASHKENT
Period5/10/225/12/22

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