In this paper, a semi-analytical technique known as the Method of Lines (MoL) with uniform and non-uniform discretization schemes is developed. The aim is to determine static potential profile in planar electronic structures. Even though this method has been known for some time, there has been reported work on its application to planar semiconductor device analysis for voltage profile determination. Since most current electronic devices are manufactured using planar and quasi-planar technology, the proposed algorithm is well suited for device analysis prior to fabrication. Compared with known popular methods such as Finite Difference and Finite Elements methods, the proposed technique is relatively simple, more accurate and unlike other methods, has no convergence problem. In addition to this, its semi-analytical nature, which consists of reducing one computing dimension, allows saving significant memory and computation time. Typical planar electronic structures are considered to demonstrate their suitability for these devices, and the obtained results are presented and discussed.
|Number of pages||8|
|Journal||Journal of Engineering Research|
|Publication status||Published - 2010|
- Method of lines
- Planar structure
- Potential profile
ASJC Scopus subject areas