Performance modeling of fault-tolerant circuit-switched communication networks

F. Safaei, A. Khonsari, M. Fathy, N. Alzeidi, M. Ould-Khaoua

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Circuit Switching (CS) has been suggested as an efficient switching method for supporting simultaneous communications (such as data, voice, and images) across parallel systems due to its ability to preserve both communication performance and fault-tolerant demands in such systems. In this paper we present an efficient scheme to capture the mean message latency in 2-D torus with CS in the presence of faulty components. We have also conducted extensive simulation experiments, the results of which are used to validate the analytical model.

Original languageEnglish
Title of host publicationPARELEC 2006 - Proceedings: International Symposium on Parallel Computing in Electrical Engineering
Pages239-244
Number of pages6
DOIs
Publication statusPublished - 2006
EventInternational Symposium on Parallel Computing in Electrical Engineering, PARELEC 2006 - Bialystok, Poland
Duration: Sep 13 2006Sep 17 2006

Other

OtherInternational Symposium on Parallel Computing in Electrical Engineering, PARELEC 2006
CountryPoland
CityBialystok
Period9/13/069/17/06

ASJC Scopus subject areas

  • Computer Science Applications
  • Electrical and Electronic Engineering

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    Safaei, F., Khonsari, A., Fathy, M., Alzeidi, N., & Ould-Khaoua, M. (2006). Performance modeling of fault-tolerant circuit-switched communication networks. In PARELEC 2006 - Proceedings: International Symposium on Parallel Computing in Electrical Engineering (pp. 239-244). [1698667] https://doi.org/10.1109/PARELEC.2006.67