M8NoC: An 8-degree mesh-based NoC architecture

N. Alzeidi*, K. Day, A. Touzene, B. Arafeh

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

In multicore systems, low transmission delay and high throughput are essential to fully harness the computational power offered by tens or hundreds of cores. In this paper we present a new NoC architecture (M8NoC) by devising changes to the topology and routing of the simple mesh network. The changes allow overcoming some limitations of the mesh network by decreasing the diameter, decreasing the average distance and increasing the bisection width. Preliminary analytical investigation have shown potential enhancements in performance and reliability. Namely, the M8NoC achieves higher throughput and lower latency compared to its mesh, torus and spidergon counterparts.

Original languageEnglish
Title of host publicationICUFN 2012 - 4th International Conference on Ubiquitous and Future Networks, Final Program
Pages192-197
Number of pages6
DOIs
Publication statusPublished - 2012
Event4th International Conference on Ubiquitous and Future Networks, ICUFN 2012 - Phuket, Thailand
Duration: Jul 4 2012Jul 6 2012

Publication series

NameICUFN 2012 - 4th International Conference on Ubiquitous and Future Networks, Final Program

Other

Other4th International Conference on Ubiquitous and Future Networks, ICUFN 2012
Country/TerritoryThailand
CityPhuket
Period7/4/127/6/12

Keywords

  • Network-on-Chip
  • multicore systems
  • performance evaluation
  • routing
  • topology
  • wormhole switching

ASJC Scopus subject areas

  • Computer Networks and Communications

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