Impact of leaky bucket regulation on the performance of combined I/O buffering in ATM switches

Adel Ben Mnaouer, Khaled Day, Khalil Shihab

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)

Abstract

We propose a Colored Petri Net (CPN) model used for prototyping and modeling a complex switching scheme for ATM switches based on the combined I/O buffering technique. The new scheme that was proposed recently in the literature is evaluated here within an overall setting that includes the traffic regulations enforced by the leaky bucket algorithm. The new scheme is based on splitting the traffic coming into input lines into two priority queues (High and Low) where traffic destined to busy ports is directed to the low priority queue. This scheme was compared against pure combined I/O buffering and simulation results showed that the new scheme pays back in decreasing transmission delay only when the traffic increases beyond a certain level. In addition the sensitivity analysis of the bucket size showed also that this latter affects the performance of the system only at high loads.

Original languageEnglish
Pages (from-to)504-509
Number of pages6
JournalProceedings of the IEEE International Conference on Systems, Man and Cybernetics
Volume1
DOIs
Publication statusPublished - 2002
Externally publishedYes

Keywords

  • ATM Switches
  • Combined I/O Buffering
  • Leaky Bucket regulator
  • Priority Queues

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Hardware and Architecture

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