@inproceedings{7e29a751872549cdaf7b6d00a35e1f98,
title = "HW/SW FPGA implementation of vector median filter",
abstract = "In this paper, we present an efficient hardware/software (HW/SW) implementation of the Vector Median Filter (VMF) using embedded system for impulsive noise suppression in color image. The hardware portion including VMF algorithm is implemented with fast parallel architectures directly in hardware using VHDL language. The remaining parts were realized in software using NIOS II softcore processor using μClinux as operating system.. The results show that the use of codesign implementation improves 48 times the filtering speed compared to the software solution.",
keywords = "Embedded system, FPGA, NIOS II softcore processor, SoPC, VMF",
author = "A. Boudabous and {Ben Atitallah}, A. and P. Kadionik and L. Khriji and N. Masmoudi",
year = "2007",
doi = "10.1109/RME.2007.4401821",
language = "English",
isbn = "1424410002",
series = "Proceedings of the 2007 Ph.D Research in Microelectronics and Electronics conference, PRIME 2007",
pages = "101--104",
booktitle = "Proceedings of the 2007 Ph.D Research in Microelectronics and Electronics conference, PRIME 2007",
note = "2007 Ph.D Research in Microelectronics and Electronics conference, PRIME 2007 ; Conference date: 02-07-2007 Through 05-07-2007",
}