Abstract
In this paper, we present an efficient hardware/software (HW/SW) implementation of the Vector Median Filter (VMF) using embedded system for impulsive noise suppression in color image. The hardware portion including VMF algorithm is implemented with fast parallel architectures directly in hardware using VHDL language. The remaining parts were realized in software using NIOS II softcore processor using μClinux as operating system.. The results show that the use of codesign implementation improves 48 times the filtering speed compared to the software solution.
Original language | English |
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Title of host publication | Proceedings of the 2007 Ph.D Research in Microelectronics and Electronics conference, PRIME 2007 |
Pages | 101-104 |
Number of pages | 4 |
DOIs | |
Publication status | Published - 2007 |
Event | 2007 Ph.D Research in Microelectronics and Electronics conference, PRIME 2007 - Bordeaux, France Duration: Jul 2 2007 → Jul 5 2007 |
Other
Other | 2007 Ph.D Research in Microelectronics and Electronics conference, PRIME 2007 |
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Country | France |
City | Bordeaux |
Period | 7/2/07 → 7/5/07 |
Keywords
- Embedded system
- FPGA
- NIOS II softcore processor
- SoPC
- VMF
ASJC Scopus subject areas
- Electrical and Electronic Engineering