Abstract
This paper proposes a novel FPGA implementation of Vector Directional Distance Rational Hybrid Filter) (VDDRHF) for mixed noise suppression and fine-details preservation in color images. The Implementation was done, based on FPGA HW/SW validation using efficient hardware optimizations and non linear function approximations. The validation using FPGA board confirms the color image quality preservation. Our proposed architecture proves that HW/SW co-design present a high timing performance compared to software based solutions.
| Original language | English |
|---|---|
| Title of host publication | 2010 7th International Multi-Conference on Systems, Signals and Devices, SSD-10 |
| DOIs | |
| Publication status | Published - 2010 |
| Event | 2010 7th International Multi-Conference on Systems, Signals and Devices, SSD-10 - Amman, Jordan Duration: Jun 27 2010 → Jun 29 2010 |
Other
| Other | 2010 7th International Multi-Conference on Systems, Signals and Devices, SSD-10 |
|---|---|
| Country | Jordan |
| City | Amman |
| Period | 6/27/10 → 6/29/10 |
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Keywords
- Architecture
- Color image
- FPGA implementation
- Nios-II
- Validation
- VDDRHF filter
ASJC Scopus subject areas
- Computer Networks and Communications
- Signal Processing
- Control and Systems Engineering
Cite this
Hardware implementation and experiment validation of the VDDRHF color image filter. / Boudabous, A.; Ben Atitallah, A.; Khriji, L.; Kadionik, P.; Masmoudi, N.
2010 7th International Multi-Conference on Systems, Signals and Devices, SSD-10. 2010. 5585526.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Hardware implementation and experiment validation of the VDDRHF color image filter
AU - Boudabous, A.
AU - Ben Atitallah, A.
AU - Khriji, L.
AU - Kadionik, P.
AU - Masmoudi, N.
PY - 2010
Y1 - 2010
N2 - This paper proposes a novel FPGA implementation of Vector Directional Distance Rational Hybrid Filter) (VDDRHF) for mixed noise suppression and fine-details preservation in color images. The Implementation was done, based on FPGA HW/SW validation using efficient hardware optimizations and non linear function approximations. The validation using FPGA board confirms the color image quality preservation. Our proposed architecture proves that HW/SW co-design present a high timing performance compared to software based solutions.
AB - This paper proposes a novel FPGA implementation of Vector Directional Distance Rational Hybrid Filter) (VDDRHF) for mixed noise suppression and fine-details preservation in color images. The Implementation was done, based on FPGA HW/SW validation using efficient hardware optimizations and non linear function approximations. The validation using FPGA board confirms the color image quality preservation. Our proposed architecture proves that HW/SW co-design present a high timing performance compared to software based solutions.
KW - Architecture
KW - Color image
KW - FPGA implementation
KW - Nios-II
KW - Validation
KW - VDDRHF filter
UR - http://www.scopus.com/inward/record.url?scp=78149237291&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=78149237291&partnerID=8YFLogxK
U2 - 10.1109/SSD.2010.5585526
DO - 10.1109/SSD.2010.5585526
M3 - Conference contribution
AN - SCOPUS:78149237291
SN - 9781424475346
BT - 2010 7th International Multi-Conference on Systems, Signals and Devices, SSD-10
ER -