Hardware implementation and experiment validation of the VDDRHF color image filter

A. Boudabous, A. Ben Atitallah, L. Khriji, P. Kadionik, N. Masmoudi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper proposes a novel FPGA implementation of Vector Directional Distance Rational Hybrid Filter) (VDDRHF) for mixed noise suppression and fine-details preservation in color images. The Implementation was done, based on FPGA HW/SW validation using efficient hardware optimizations and non linear function approximations. The validation using FPGA board confirms the color image quality preservation. Our proposed architecture proves that HW/SW co-design present a high timing performance compared to software based solutions.

Original languageEnglish
Title of host publication2010 7th International Multi-Conference on Systems, Signals and Devices, SSD-10
DOIs
Publication statusPublished - 2010
Event2010 7th International Multi-Conference on Systems, Signals and Devices, SSD-10 - Amman, Jordan
Duration: Jun 27 2010Jun 29 2010

Other

Other2010 7th International Multi-Conference on Systems, Signals and Devices, SSD-10
CountryJordan
CityAmman
Period6/27/106/29/10

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Keywords

  • Architecture
  • Color image
  • FPGA implementation
  • Nios-II
  • Validation
  • VDDRHF filter

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Signal Processing
  • Control and Systems Engineering

Cite this

Boudabous, A., Ben Atitallah, A., Khriji, L., Kadionik, P., & Masmoudi, N. (2010). Hardware implementation and experiment validation of the VDDRHF color image filter. In 2010 7th International Multi-Conference on Systems, Signals and Devices, SSD-10 [5585526] https://doi.org/10.1109/SSD.2010.5585526