Abstract
In this paper, we present a fast implementation of the vector directional distance filter (VDDF) for noise suppression and fine-details preservation in color image, based on FPGA hardware/software (HW/SW) environment. For the ease of implementation, we have proposed some approximations. An efficient hardware implementation is developed to acquire best execution time. After validation, using NiosII development board, we demonstrate a clearly improvement in the filtering speed compared to the software solution. Experiments on a large and diverse image sets show that our implementation approach achieves an excellent balance between simplicity, accuracy, and computational speed.
| Original language | English |
|---|---|
| Title of host publication | 5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010 |
| DOIs | |
| Publication status | Published - 2010 |
| Event | 5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010 - Hammamet, Tunisia Duration: Mar 23 2010 → Mar 25 2010 |
Other
| Other | 5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010 |
|---|---|
| Country | Tunisia |
| City | Hammamet |
| Period | 3/23/10 → 3/25/10 |
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ASJC Scopus subject areas
- Control and Systems Engineering
- Electrical and Electronic Engineering
Cite this
FPGA implementation of vector directional distance filter. / Boudabous, A.; Ben Atitallah, A.; Khriji, L.; Kadionik, P.; Masmoudi, N.
5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010. 2010. 5487600.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - FPGA implementation of vector directional distance filter
AU - Boudabous, A.
AU - Ben Atitallah, A.
AU - Khriji, L.
AU - Kadionik, P.
AU - Masmoudi, N.
PY - 2010
Y1 - 2010
N2 - In this paper, we present a fast implementation of the vector directional distance filter (VDDF) for noise suppression and fine-details preservation in color image, based on FPGA hardware/software (HW/SW) environment. For the ease of implementation, we have proposed some approximations. An efficient hardware implementation is developed to acquire best execution time. After validation, using NiosII development board, we demonstrate a clearly improvement in the filtering speed compared to the software solution. Experiments on a large and diverse image sets show that our implementation approach achieves an excellent balance between simplicity, accuracy, and computational speed.
AB - In this paper, we present a fast implementation of the vector directional distance filter (VDDF) for noise suppression and fine-details preservation in color image, based on FPGA hardware/software (HW/SW) environment. For the ease of implementation, we have proposed some approximations. An efficient hardware implementation is developed to acquire best execution time. After validation, using NiosII development board, we demonstrate a clearly improvement in the filtering speed compared to the software solution. Experiments on a large and diverse image sets show that our implementation approach achieves an excellent balance between simplicity, accuracy, and computational speed.
UR - http://www.scopus.com/inward/record.url?scp=77957888971&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77957888971&partnerID=8YFLogxK
U2 - 10.1109/DTIS.2010.5487600
DO - 10.1109/DTIS.2010.5487600
M3 - Conference contribution
AN - SCOPUS:77957888971
SN - 9781424463404
BT - 5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010
ER -