FPGA implementation of vector directional distance filter

A. Boudabous; A. Ben Atitallah; L. Khriji; P. Kadionik; N. Masmoudi

doi:10.1109/DTIS.2010.5487600

FPGA implementation of vector directional distance filter

A. Boudabous, A. Ben Atitallah, L. Khriji, P. Kadionik, N. Masmoudi

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

In this paper, we present a fast implementation of the vector directional distance filter (VDDF) for noise suppression and fine-details preservation in color image, based on FPGA hardware/software (HW/SW) environment. For the ease of implementation, we have proposed some approximations. An efficient hardware implementation is developed to acquire best execution time. After validation, using NiosII development board, we demonstrate a clearly improvement in the filtering speed compared to the software solution. Experiments on a large and diverse image sets show that our implementation approach achieves an excellent balance between simplicity, accuracy, and computational speed.

Original language	English
Title of host publication	5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010
DOIs	https://doi.org/10.1109/DTIS.2010.5487600
Publication status	Published - 2010
Event	5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010 - Hammamet, Tunisia Duration: Mar 23 2010 → Mar 25 2010

Other

Other	5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010
Country	Tunisia
City	Hammamet
Period	3/23/10 → 3/25/10

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ASJC Scopus subject areas

Control and Systems Engineering
Electrical and Electronic Engineering

Cite this

Boudabous, A., Ben Atitallah, A., Khriji, L., Kadionik, P., & Masmoudi, N. (2010). FPGA implementation of vector directional distance filter. In 5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010 [5487600] https://doi.org/10.1109/DTIS.2010.5487600

Boudabous, A, Ben Atitallah, A, Khriji, L, Kadionik, P & Masmoudi, N 2010, FPGA implementation of vector directional distance filter. in 5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010., 5487600, 5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010, Hammamet, Tunisia, 3/23/10. https://doi.org/10.1109/DTIS.2010.5487600

@inproceedings{6c4346c2a0ee43ea89ddacab13031837,

title = "FPGA implementation of vector directional distance filter",

abstract = "In this paper, we present a fast implementation of the vector directional distance filter (VDDF) for noise suppression and fine-details preservation in color image, based on FPGA hardware/software (HW/SW) environment. For the ease of implementation, we have proposed some approximations. An efficient hardware implementation is developed to acquire best execution time. After validation, using NiosII development board, we demonstrate a clearly improvement in the filtering speed compared to the software solution. Experiments on a large and diverse image sets show that our implementation approach achieves an excellent balance between simplicity, accuracy, and computational speed.",

author = "A. Boudabous and {Ben Atitallah}, A. and L. Khriji and P. Kadionik and N. Masmoudi",

year = "2010",

doi = "10.1109/DTIS.2010.5487600",

language = "English",

isbn = "9781424463404",

booktitle = "5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010",

note = "5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010 ; Conference date: 23-03-2010 Through 25-03-2010",

}

TY - GEN

T1 - FPGA implementation of vector directional distance filter

AU - Boudabous, A.

AU - Ben Atitallah, A.

AU - Khriji, L.

AU - Kadionik, P.

AU - Masmoudi, N.

PY - 2010

Y1 - 2010

N2 - In this paper, we present a fast implementation of the vector directional distance filter (VDDF) for noise suppression and fine-details preservation in color image, based on FPGA hardware/software (HW/SW) environment. For the ease of implementation, we have proposed some approximations. An efficient hardware implementation is developed to acquire best execution time. After validation, using NiosII development board, we demonstrate a clearly improvement in the filtering speed compared to the software solution. Experiments on a large and diverse image sets show that our implementation approach achieves an excellent balance between simplicity, accuracy, and computational speed.

AB - In this paper, we present a fast implementation of the vector directional distance filter (VDDF) for noise suppression and fine-details preservation in color image, based on FPGA hardware/software (HW/SW) environment. For the ease of implementation, we have proposed some approximations. An efficient hardware implementation is developed to acquire best execution time. After validation, using NiosII development board, we demonstrate a clearly improvement in the filtering speed compared to the software solution. Experiments on a large and diverse image sets show that our implementation approach achieves an excellent balance between simplicity, accuracy, and computational speed.

UR - http://www.scopus.com/inward/record.url?scp=77957888971&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77957888971&partnerID=8YFLogxK

U2 - 10.1109/DTIS.2010.5487600

DO - 10.1109/DTIS.2010.5487600

M3 - Conference contribution

AN - SCOPUS:77957888971

SN - 9781424463404

BT - 5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010

T2 - 5th Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2010

Y2 - 23 March 2010 through 25 March 2010

ER -

Access to Document

10.1109/DTIS.2010.5487600