FPGA-accelerator system for computing biologically inspired feature extraction models

Michael DeBole*, Yang Xiao, Chi Li Yu, Ahmed Al Maashri, Matthew Cotter, Chaitali Chakrabarti, Vijaykrishnan Narayanan

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

Neuromorphic algorithms for computer-based vision may be the next step towards improving the way computers gather and interpret visual information. However, these algorithms typically have high computational demands making them difficult to deploy in embedded environments where power consumption is equally as important as performance. In this paper, we present an embedded implementation of a ventral visual pathway model, HMAX. We describe an embedded FPGA system that implements the model, as well as accelerator engines necessary to ensure adequate performance. The final system is shown to operate within a power budget of 3W while achieving up to 16.5X speedup over a pure embedded processor implementation.

Original languageEnglish
Title of host publicationConference Record of the 45th Asilomar Conference on Signals, Systems and Computers, ASILOMAR 2011
Pages751-755
Number of pages5
DOIs
Publication statusPublished - 2011
Externally publishedYes
Event45th Asilomar Conference on Signals, Systems and Computers, ASILOMAR 2011 - Pacific Grove, CA, United States
Duration: Nov 6 2011Nov 9 2011

Publication series

NameConference Record - Asilomar Conference on Signals, Systems and Computers
ISSN (Print)1058-6393

Other

Other45th Asilomar Conference on Signals, Systems and Computers, ASILOMAR 2011
Country/TerritoryUnited States
CityPacific Grove, CA
Period11/6/1111/9/11

Keywords

  • Embedded Hardware
  • FPGA
  • Neuromorphic vision algorithms
  • Signal Processing Hardware

ASJC Scopus subject areas

  • Signal Processing
  • Computer Networks and Communications

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