Clustering algorithm for scheduling parallel programs on NOWs with synchronization requirements at the application level

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

In this work, we are interested in developing an efficient heuristic algorithm for scheduling the tasks of a parallel program based on the class of UNC (Unbounded Number of Clusters) scheduling algorithms for clusters of NOWs. The main objective of the proposed UNC algorithm is to consider synchronous communication with deadlock avoidance strategy for inter-task message-passing. The proposed algorithm generates non-linear clusters by traversing the task graph (DAG) once, using the Edge-Zeroing (EZ) technique. The objectives of the clustering algorithm is reducing the parallel time of the program, reducing the communication cost, improving the program computation to communication ratio (PCCR), and avoiding deadlock situations. The algorithm achieves its objectives with a time complexity O(|V|(log|V| + (|E|)2)) using nonlinear clustering in order to avoid more than one pass through the task DAG and to be able to deal with task DAGs with fine, medium, and coarse granularity.

Original languageEnglish
Title of host publicationProceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages625-632
Number of pages8
ISBN (Print)0769515738, 9780769515731
DOIs
Publication statusPublished - 2002
Event16th International Parallel and Distributed Processing Symposium, IPDPS 2002 - Ft. Lauderdale, United States
Duration: Apr 15 2002Apr 19 2002

Other

Other16th International Parallel and Distributed Processing Symposium, IPDPS 2002
CountryUnited States
CityFt. Lauderdale
Period4/15/024/19/02

Fingerprint

Cluster Algorithm
Parallel Programs
Number of Clusters
Clustering algorithms
Clustering Algorithm
Synchronization
Scheduling
Deadlock Avoidance
Task Graph
Communication
Communication Cost
Requirements
Deadlock
Message Passing
Granularity
Scheduling Algorithm
Heuristic algorithm
Time Complexity
Efficient Algorithms
Message passing

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Modelling and Simulation

Cite this

Arafeh, B. R. (2002). Clustering algorithm for scheduling parallel programs on NOWs with synchronization requirements at the application level. In Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002 (pp. 625-632). [1015567] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IPDPS.2002.1015567

Clustering algorithm for scheduling parallel programs on NOWs with synchronization requirements at the application level. / Arafeh, B. R.

Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002. Institute of Electrical and Electronics Engineers Inc., 2002. p. 625-632 1015567.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Arafeh, BR 2002, Clustering algorithm for scheduling parallel programs on NOWs with synchronization requirements at the application level. in Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002., 1015567, Institute of Electrical and Electronics Engineers Inc., pp. 625-632, 16th International Parallel and Distributed Processing Symposium, IPDPS 2002, Ft. Lauderdale, United States, 4/15/02. https://doi.org/10.1109/IPDPS.2002.1015567
Arafeh BR. Clustering algorithm for scheduling parallel programs on NOWs with synchronization requirements at the application level. In Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002. Institute of Electrical and Electronics Engineers Inc. 2002. p. 625-632. 1015567 https://doi.org/10.1109/IPDPS.2002.1015567
Arafeh, B. R. / Clustering algorithm for scheduling parallel programs on NOWs with synchronization requirements at the application level. Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002. Institute of Electrical and Electronics Engineers Inc., 2002. pp. 625-632
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