Architecture and HW/SW validation of nonlinear Border-Preserving Interpolator

Anis Boudabous, Ahmed Ben Atitallah, Lazhar Khriji, Nouri Masmoudi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, a new hardware implementation of the Border-Preserving Interpolator is presented. The object of this proposed work is to achieve significant run time performance using a hardware development board. It also demonstrates consistent image quality performance among a variety of images. This validation show that our implementation based on HW/SW design speeds up the interpolation process as well as preserving a high image quality.

Original languageEnglish
Title of host publication7th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2012
DOIs
Publication statusPublished - 2012
Event7th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2012 - Gammarth, Tunisia
Duration: May 16 2012May 18 2012

Other

Other7th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2012
CountryTunisia
CityGammarth
Period5/16/125/18/12

Fingerprint

Image quality
Hardware
Interpolation

Keywords

  • color image
  • FPGA
  • HW/SW
  • Nonlinear interpolation
  • Reconfigurable Architecture

ASJC Scopus subject areas

  • Control and Systems Engineering

Cite this

Boudabous, A., Ben Atitallah, A., Khriji, L., & Masmoudi, N. (2012). Architecture and HW/SW validation of nonlinear Border-Preserving Interpolator. In 7th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2012 [6232968] https://doi.org/10.1109/DTIS.2012.6232968

Architecture and HW/SW validation of nonlinear Border-Preserving Interpolator. / Boudabous, Anis; Ben Atitallah, Ahmed; Khriji, Lazhar; Masmoudi, Nouri.

7th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2012. 2012. 6232968.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Boudabous, A, Ben Atitallah, A, Khriji, L & Masmoudi, N 2012, Architecture and HW/SW validation of nonlinear Border-Preserving Interpolator. in 7th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2012., 6232968, 7th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2012, Gammarth, Tunisia, 5/16/12. https://doi.org/10.1109/DTIS.2012.6232968
Boudabous A, Ben Atitallah A, Khriji L, Masmoudi N. Architecture and HW/SW validation of nonlinear Border-Preserving Interpolator. In 7th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2012. 2012. 6232968 https://doi.org/10.1109/DTIS.2012.6232968
Boudabous, Anis ; Ben Atitallah, Ahmed ; Khriji, Lazhar ; Masmoudi, Nouri. / Architecture and HW/SW validation of nonlinear Border-Preserving Interpolator. 7th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2012. 2012.
@inproceedings{393421836c9741a1bb9748d115c33063,
title = "Architecture and HW/SW validation of nonlinear Border-Preserving Interpolator",
abstract = "In this paper, a new hardware implementation of the Border-Preserving Interpolator is presented. The object of this proposed work is to achieve significant run time performance using a hardware development board. It also demonstrates consistent image quality performance among a variety of images. This validation show that our implementation based on HW/SW design speeds up the interpolation process as well as preserving a high image quality.",
keywords = "color image, FPGA, HW/SW, Nonlinear interpolation, Reconfigurable Architecture",
author = "Anis Boudabous and {Ben Atitallah}, Ahmed and Lazhar Khriji and Nouri Masmoudi",
year = "2012",
doi = "10.1109/DTIS.2012.6232968",
language = "English",
isbn = "9781467319287",
booktitle = "7th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2012",

}

TY - GEN

T1 - Architecture and HW/SW validation of nonlinear Border-Preserving Interpolator

AU - Boudabous, Anis

AU - Ben Atitallah, Ahmed

AU - Khriji, Lazhar

AU - Masmoudi, Nouri

PY - 2012

Y1 - 2012

N2 - In this paper, a new hardware implementation of the Border-Preserving Interpolator is presented. The object of this proposed work is to achieve significant run time performance using a hardware development board. It also demonstrates consistent image quality performance among a variety of images. This validation show that our implementation based on HW/SW design speeds up the interpolation process as well as preserving a high image quality.

AB - In this paper, a new hardware implementation of the Border-Preserving Interpolator is presented. The object of this proposed work is to achieve significant run time performance using a hardware development board. It also demonstrates consistent image quality performance among a variety of images. This validation show that our implementation based on HW/SW design speeds up the interpolation process as well as preserving a high image quality.

KW - color image

KW - FPGA

KW - HW/SW

KW - Nonlinear interpolation

KW - Reconfigurable Architecture

UR - http://www.scopus.com/inward/record.url?scp=84864862766&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84864862766&partnerID=8YFLogxK

U2 - 10.1109/DTIS.2012.6232968

DO - 10.1109/DTIS.2012.6232968

M3 - Conference contribution

AN - SCOPUS:84864862766

SN - 9781467319287

BT - 7th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2012

ER -