A BSP performance prediction model for parallel multigrid algorithms

B. O. Osoba, F. A. Rabhi, M. Ould-Khaoua

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a BSP performance prediction model to support a programming environment for parallel multigrid algorithms. The model assists the user in the selection of the optimal problem parameters and directs the code generation scheme. Simulation experiments confirm that the model can be used asseful design tool to predict the optimal values of some numerical as well as implementation parameters for a given BSP architecture.

Original languageEnglish
Title of host publicationICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems
Pages403-406
Number of pages4
DOIs
Publication statusPublished - 2000
Externally publishedYes
Event7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000 - Jounieh, Lebanon
Duration: Dec 17 2000Dec 20 2000

Publication series

NameProceedings of the IEEE International Conference on Electronics, Circuits, and Systems
Volume1

Other

Other7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000
Country/TerritoryLebanon
CityJounieh
Period12/17/0012/20/00

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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