A BSP performance prediction model for parallel multigrid algorithms

B. O. Osoba, F. A. Rabhi, M. Ould-Khaoua

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a BSP performance prediction model to support a programming environment for parallel multigrid algorithms. The model assists the user in the selection of the optimal problem parameters and directs the code generation scheme. Simulation experiments confirm that the model can be used asseful design tool to predict the optimal values of some numerical as well as implementation parameters for a given BSP architecture.

Original languageEnglish
Title of host publicationProceedings of the IEEE International Conference on Electronics, Circuits, and Systems
Pages403-406
Number of pages4
Volume1
DOIs
Publication statusPublished - 2000
Event7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000 - Jounieh, Lebanon
Duration: Dec 17 2000Dec 20 2000

Other

Other7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000
CountryLebanon
CityJounieh
Period12/17/0012/20/00

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Osoba, B. O., Rabhi, F. A., & Ould-Khaoua, M. (2000). A BSP performance prediction model for parallel multigrid algorithms. In Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems (Vol. 1, pp. 403-406). [911566] https://doi.org/10.1109/ICECS.2000.911566