TY - GEN
T1 - Performance modeling of fault-tolerant circuit-switched communication networks
AU - Safaei, F.
AU - Khonsari, A.
AU - Fathy, M.
AU - Alzeidi, N.
AU - Ould-Khaoua, M.
PY - 2006
Y1 - 2006
N2 - Circuit Switching (CS) has been suggested as an efficient switching method for supporting simultaneous communications (such as data, voice, and images) across parallel systems due to its ability to preserve both communication performance and fault-tolerant demands in such systems. In this paper we present an efficient scheme to capture the mean message latency in 2-D torus with CS in the presence of faulty components. We have also conducted extensive simulation experiments, the results of which are used to validate the analytical model.
AB - Circuit Switching (CS) has been suggested as an efficient switching method for supporting simultaneous communications (such as data, voice, and images) across parallel systems due to its ability to preserve both communication performance and fault-tolerant demands in such systems. In this paper we present an efficient scheme to capture the mean message latency in 2-D torus with CS in the presence of faulty components. We have also conducted extensive simulation experiments, the results of which are used to validate the analytical model.
UR - http://www.scopus.com/inward/record.url?scp=81455136835&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=81455136835&partnerID=8YFLogxK
U2 - 10.1109/PARELEC.2006.67
DO - 10.1109/PARELEC.2006.67
M3 - Conference contribution
AN - SCOPUS:81455136835
SN - 0769525547
SN - 9780769525549
T3 - PARELEC 2006 - Proceedings: International Symposium on Parallel Computing in Electrical Engineering
SP - 239
EP - 244
BT - PARELEC 2006 - Proceedings
T2 - International Symposium on Parallel Computing in Electrical Engineering, PARELEC 2006
Y2 - 13 September 2006 through 17 September 2006
ER -