@inproceedings{66d85eaf07624dfca3637bc8d36a9577,
title = "Hardware implementation and experiment validation of the VDDRHF color image filter",
abstract = "This paper proposes a novel FPGA implementation of Vector Directional Distance Rational Hybrid Filter) (VDDRHF) for mixed noise suppression and fine-details preservation in color images. The Implementation was done, based on FPGA HW/SW validation using efficient hardware optimizations and non linear function approximations. The validation using FPGA board confirms the color image quality preservation. Our proposed architecture proves that HW/SW co-design present a high timing performance compared to software based solutions.",
keywords = "Architecture, Color image, FPGA implementation, Nios-II, VDDRHF filter, Validation",
author = "A. Boudabous and {Ben Atitallah}, A. and L. Khriji and P. Kadionik and N. Masmoudi",
year = "2010",
doi = "10.1109/SSD.2010.5585526",
language = "English",
isbn = "9781424475346",
series = "2010 7th International Multi-Conference on Systems, Signals and Devices, SSD-10",
booktitle = "2010 7th International Multi-Conference on Systems, Signals and Devices, SSD-10",
note = "2010 7th International Multi-Conference on Systems, Signals and Devices, SSD-10 ; Conference date: 27-06-2010 Through 29-06-2010",
}