Design of a tokenless architecture for parallel computations using associative dataflow processor

Tariq Jamil*, R. G. Deshmukh

*المؤلف المقابل لهذا العمل

نتاج البحث: المساهمة في مجلةConference articleمراجعة النظراء

2 اقتباسات (Scopus)

ملخص

The limitations and weaknesses associated with control-flow and data-flow are described, leading to the description of the proposed concept of associative dataflow. Simulation results of existing dataflow systems are compared with associative dataflow model to support the fact that the new model of computation provides faster execution time and better ALU utilization than the conventional models. Design of an associative data flow system is described by providing as much details as can possibly be incorporated to understand the concept with reference to existing computer systems. Lastly, specifications of the designed system are outlined by listing important characteristics of the associative dataflow system.

اللغة الأصليةEnglish
الصفحات (من إلى)649-656
عدد الصفحات8
دوريةConference Proceedings - IEEE SOUTHEASTCON
حالة النشرPublished - 1996
منشور خارجيًانعم
الحدثProceedings of the 1996 IEEE SOUTHEASTCON Conference - Tampa, FL, USA
المدة: أبريل ١١ ١٩٩٦أبريل ١٤ ١٩٩٦

ASJC Scopus subject areas

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