An analytical comparison of the spidergon and rectangular mesh NoCs

Mahmoud Moadeli*, Ali Shahrabi, Wim Vanderbauwhede, Mohamed Ould-Khaoua

*المؤلف المقابل لهذا العمل

نتاج البحث: المساهمة في مجلةArticleمراجعة النظراء

ملخص

Networks on chip (NoC) emerged as a structured and scalable communication medium for development of future Systems-on-Chip (SoC). Due to its unique features in terms of scalability and ease of synthesis, the (rectangular) mesh topology is regarded as an appropriate candidate for on-chip network development. On the other hand, the Spidergon NoC has been proposed as an alternative topology to realize cost effective multi-processor SoC (MPSoC) development. This paper presents analytical models of the average message latency and network throughput for both rectangular mesh and the Spidergon NoC employing wormhole switching. For each model, the validity of the analysis is verified by comparing the analytical model against the results produced by a discrete event simulator. Using the developed models, we then compare these topologies from different perspectives including manufacturing issues, message latency and network throughput.

اللغة الأصليةEnglish
الصفحات (من إلى)167-188
عدد الصفحات22
دوريةJournal of Interconnection Networks
مستوى الصوت10
رقم الإصدار1-2
المعرِّفات الرقمية للأشياء
حالة النشرPublished - 2009

ASJC Scopus subject areas

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