Achievement of higher testability goals through the modification of shift registers in LFSR-based testing

The paper is devoted to the achievement of higher testability goals in the BIST environment through the modification of shift registers in LFSR-based testing. The aim is here to take the unified view of the effectiveness of various test-generation and response evaluation techniques with BIST capabilities to justify the design of unified built-in testing scheme. With this objective in mind, a comprehensive analysis of the principles involved has been undertaken to evolve an effective design approach for LFSR-based testing of combinational circuits. The proposed unified testing scheme is analysed through the testing of many ICs through a simulation study. Also, the design implementation of the scheme does not require extra hardware.