@inproceedings{7286039bf4e44df694604c3ddc6180aa,
title = "A heuristic approach towards the designs of digital logic circuits in Built-In Test environment with optimal solution",
abstract = "In today's world Built-In Test is the necessity for the designs of digital logic circuits. However, providing solutions with such concept requires cumbersome and typical procedures of designs and because of this majority of the design go without incorporating the features of Built-In Test in the designs. The design procedures further aggravates if optimal design is needed. Hence, in view of this, an idea of a heuristic approach towards the designs of digital logic circuits in Built-In Test environment with optimal solution is proposed through this paper.",
keywords = "Built-in self-Test, Built-in test, Circuit under test, Design for test, Fault cover, Test sequence",
author = "A. Ahmad and S. Ahmad and D. Al-Abri and T. Jamil and Rizvi, {M. A.K.}",
note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 6th International Conference on Computing, Communications and Networking Technologies, ICCCNT 2015 ; Conference date: 13-07-2015 Through 15-07-2015",
year = "2016",
month = jan,
day = "29",
doi = "10.1109/ICCCNT.2015.7395238",
language = "English",
series = "6th International Conference on Computing, Communications and Networking Technologies, ICCCNT 2015",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "6th International Conference on Computing, Communications and Networking Technologies, ICCCNT 2015",
}